HT MC Phono Stage AD797

If you really want to have look at the way Groundplanes are laid then have a look at this as for a better learning experience.

These are Continuous Planes without any cutting of any order. :)

I hope this helps.

Kanwar

Kanwar,

Thank you for your response.

I am not upset, I don't even have a temper.

I have a question, if you wouldn't mind?

If using a double sided PCB with an uninterrupted ground plane on the top how do you suggest routing the supply rails on the bottom without crossing other traces?

Here is an interesting article regarding right angle traces:

Who's Afraid of the Big Bad Bend? by Dr. Howard Johnson.

Who's Afraid of the Big Bad Bend?
 
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Kanwar,

Thank you for your response.

I am not upset, I don't even have a temper.

I have a question, if you wouldn't mind?

If using a double sided PCB with an uninterrupted ground plane on the top how do you suggest routing the supply rails on the bottom without crossing other traces?

If you can show me the schematic, i can make a conceptual layout for you, which will include the said power supply tracks, differential filtering, common mode filtering as well. Along with the tips to create a guard rail surrounding input nodes of the opamp, to keep the RF out of picture. Also i need to see if you are using the recommendations given by Scott Wurcer the chip designer himself about the stability criterion.

Since you use batteries, lot of contamination is ignored just due to pure DC source which in your case is a big helper in this. Otherwise if you try to use other types of power supply source , many things will come up.

Kanwar, You are Guru. Please help all small time DIY'ers (here in HFV) with some constructive suggestion (of-course using your knowledge :)). This could lead improvement in said project and some enlightenment to us.

Mishra ji,

I am not guru, i am still a learner, i always love to help people in correcting mistakes in diying as per my knowledge capacity. There is a term constructive criticism, if you look at my previous post you will see that when ever i pointed out mistakes, i also gave the reasons behind it and correcting ways along with it.:)

There are certainly exception where you want to cut ground planes and separate them to avoid unwanted interaction between PS and signal. Also PCB ground lines sometime needs Star grounding which conducts ground currents from parts to Central point near PS. Also ground plane and surrounding copper which is not in path of return current still grounded and separated for shielding signal and its return path. Isn't that so?

Groundplanes are cut into small islands and then grouped/clubbed into a STAR ground whenever you have different set of circuits such as digital and analog sections present on single PCB, such as in DAC. But in this case also, the ground planes are not CUT just to route power supply rails. Although small jumpers are permissible when necessary.

If you look at multi layer boards, there you will see Top layer being groundplane, then comes 1st mid signal layer and 2nd mid layer being a power plane which is nothing but a power supply rail having properties of a ground plane. The idea behind this is to keep the potential especially the common mode component confined to minimum and keep the inductance to bare minimum.

When you use a grounplane it becomes obivius that certain return currents are always there, for example if the decoupling capacitors have one leg joined with groundplane itself.

Here is an interesting article regarding right angle traces:

Who's Afraid of the Big Bad Bend? by Dr. Howard Johnson.

Who's Afraid of the Big Bad Bend?

I would like to ask Mr. Howard a question about the ringing and delay in settling time on squarewaves when driven through right angled bend vs octagonal bends.:D
Ringing is directly proportional to the EMI ingress and RF contamination To and Fro.

Numerous experiments are done to validate the effect, i am not alone, but great names in instrumentation engineering have numerous white papers on high speed PCB design with an indepth analysis on this subject.
 
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Since you use batteries, lot of contamination is ignored just due to pure DC source which in your case is a big helper in this. Otherwise if you try to use other types of power supply source , many things will come up.

Cheers,
Kanwar

We have used LM317/337 based Power supply whcih Omishra designed and couldn't make out any difference.A well designed power supply also important IMO.I can't comment on wall wart type supplies.

Regards,
Sachin
 
If you can show me the schematic, i can make a conceptual layout for you, which will include the said power supply tracks, differential filtering, common mode filtering as well. Along with the tips to create a guard rail surrounding input nodes of the opamp, to keep the RF out of picture. Also i need to see if you are using the recommendations given by Scott Wurcer the chip designer himself about the stability criterion.

Since you use batteries, lot of contamination is ignored just due to pure DC source which in your case is a big helper in this. Otherwise if you try to use other types of power supply source , many things will come up.

That would be stellar I will post one as soon as I can.

I would like to ask Mr. Howard a question about the ringing and delay in settling time on squarewaves when driven through right angled bend vs octagonal bends.:D

Ringing is directly proportional to the EMI ingress and RF contamination To and Fro.

Numerous experiments are done to validate the effect, i am not alone, but great names in instrumentation engineering have numerous white papers on high speed PCB design with an indepth analysis on this subject.

I posted this to illustrate there are divided opinions from so called experts in the field on the matter, and often it is hard for us that don't have access to exotic test equipment to sort the hay from the chaff. Or the resources to make several prototypes to evaluate differences.

I do notice though that the traces are rounded on the outer edges does this in fact make any difference to the ringing effect?
 
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I do notice though that the traces are rounded on the outer edges does this in fact make any difference to the ringing effect?

Lesser the edges, lesser the chances of ringing. Sometimes parallel closely separated tracks often used to keep the trace inductance to bare minimum, thus attenuating the ringing.

All interested Folks can have a look.....:)

The promised layout......:D

phono3_zps2c685fd4.png


phono2_zps20c49534.png


Phono_zpsfae275c8.png



The new layout has continuous groundplane[Clubbed 2 islands to form a STAR], Some necessary components added, Differential as well as better common mode filtering, updated footprints, Guard Rail ground tracks around sensitive - input nodes, better component placement and more FUN...!!!!

Part labeling and mounting holes are remaining to be added.

Cheers,
Kanwar
 
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That looks awesome Kanwar.

Can you enlighten us to what extra components were added? I see some ceramics have been added across the supply rails, and some current limiting resistors added for lower noise.

I notice that the extra mounting holes for the DC blocking caps at the outputs are missing, some people use the Panasonics with the 15mm spacing, some use the 22.5mm and the recommended Wima's are 27mm.

Thank you for your help and hard work, I am a novice at PCB design and have had to learn along the way.
 
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That looks awesome Kanwar.

Can you enlighten us to what extra components were added? I see some ceramics have been added across the supply rails, and some current limiting resistors added for lower noise.

I notice that the extra mounting holes for the DC blocking caps at the outputs are missing, some people use the Panasonics with the 15mm spacing, some use the 22.5mm and the recommended Wima's are 27mm.

Thank you for your help and hard work, I am a novice at PCB design and have had to learn along the way.

Additional components are differential capacitors[I would like to use films against ceramics] across rails, thats the differential filtering. Then power supply decoupling resistors were added to keep the ripple current confined to the loop where it is circling thus keeping the signal to noise ration higher. Also i added a capacitor from -input of first stage opamp to its output which helps in maintaining stability. So these were the key components.
Also you can see the way the rail to ground caps near the power supply pins, they now share short return ground path as well. Not to forget the layout has comprehensive features such has gnd track shielding the - input nodes of opamp. The way the groundplanes are laid is another trick.

I will update the layout featuring multi-footprint for output capacitor mounting holes.
IMHO, you can remove the output cap if the output offset is not high and within +/-30mV. It will certainly improve the things for sure. No idea why its used there at first place.


Kanwar
 
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Kanwar, that's great! :thumbsup:

So as expected this thread turned out wealth for learners like me. Thanks for all debate and illustration. New lesson learnt. :yahoo:
 
Guys,
I did some troubleshooting with the circuitry. I connected two 9V batteries (via DPDT switch), and measured the voltages across the V+ and V- points of opamps.

Here's what I found:
1) OA1 and OA2 (AD797): shows +17.62V across pins 4 (-V) and 7 (+V). One battery reads 8.80V and the other reads 8.82V. So the numbers do add up.

2) OA3 and OA4 (LME49990): shows 0V across pins 4 (-V) and 8 (+V). My understanding from reading the spec sheet of OPA 2134 which is exactly compatible with the dual SOIC LME49990, says pin 4 is -V and pin 8 is +V.

HOWEVER, there is 17.62 Volts across pins 4 and 7 on both OA3 and OA4. Are pins 4 and 8 the correct pins for -V and +V, respectively for the dual SOIC LME49990? Or is it pins 4 and 7 as is the case here?

To be sure that it is not the DPDT switch acting funny, I took that off completely from the circuitry and directly soldered the 9V battery adapter leads to the circuit board. There is still no voltage across pins 4 and 8 on LME49990. All these tests are carried out without the opamps in the socket.

I also re-checked the opamp adapter alignments and all four are correct, meaning the alignment of the "D" cutout on the chip is as per the diagram on the board.

Now I am confused.
 
Hi Joshua,
Can you measure the voltage at +/GND/- (where you connect batteries on PCB) on PCB?
EDIT: I think you are running single voltage supply.Voltage should be close to +9/-9 on PCB.

Regards,
Sachin
 
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Hi Joshua,
Can you measure the voltage at +/GND/- (where you connect batteries on PCB) on PCB?
EDIT: I think you are running single voltage supply.Voltage should be close to +9/-9 on PCB.

Regards,
Sachin

If one measures the V+ and V- wrt ground, yes the voltages should be close to +9V and -9V. If we measure across V+ and V-, it has to be close to 9 x 2 volts.

My real doubt here is whether for the dual SOIC adapter for 8 pin DIP, if V+ is pin 8 or pin 7. As per my understanding, it must be pin 8. But on pin 8 I'm not getting ~+9V, but seeing zero. Whereas I'm seeing near +9V on pin 7 which ought to be OUT B.
 
My understanding from reading the spec sheet of OPA 2134 which is exactly compatible with the dual SOIC LME49990, says pin 4 is -V and pin 8 is +V.

The OPA2134 is not compatible with the LME49990 and not compatible with the AD797 Phono Stage.

The LME49990 is a single circuit op amp and powered on pins 4 (negative) and pin 7 (positive), the OPA 2134 is a dual circuit op amp and is powered on pins 4 & 8.

If you get a dual adaptor that has 2 LME49990's, one soldered to the bottom and top it will still be powered on pins 4 & 8 and will still not be compatible in the AD797 phono stage.

You need to have LME49990's soldered to single SOIC to DIP adaptors, they are powered on pins 4 & 7. One for each socket on the AD797 which have the supply rails connected to pins 4 & 7.

Like this:

2pcs LME49990 DIP8 Adapters | eBay

Hope this makes sense.

No Affiliation.
 
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If one measures the V+ and V- wrt ground, yes the voltages should be close to +9V and -9V. If we measure across V+ and V-, it has to be close to 9 x 2 volts.

My real doubt here is whether for the dual SOIC adapter for 8 pin DIP, if V+ is pin 8 or pin 7. As per my understanding, it must be pin 8. But on pin 8 I'm not getting ~+9V, but seeing zero. Whereas I'm seeing near +9V on pin 7 which ought to be OUT B.

If you are using a dual SOIC adapter it will not work.

You must use a single SOIC adapter .
 
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Just bought these.Joshua I will send you these adapters with LME49990 mounted on them as soon as I receive them.

Regards,
Sachin

Hang on, hang on....

The LME49990s are as in the picture below:



Note that there is one more LME49990 opamp on the lower side of the adapter board, which makes it a dual.

I received them pre-soldered from Sachin, and have successfully used this pair of dual LME49990 on the HT MC PS Mark I. I used it interchangeably with the OPA2134, which is why I had mentioned that the pin-outs are compatible. I am not very certain any more but I think I have also successfully used this in place of the OPA2134 in the CNC phono stage.

Since I already had this pair of LME49990, please recall that I had not ordered one more pair along with the AD797 kit.

So I still feel that the problem is not in the LME opamp but somewhere in the circuit board. Has any one else competed their build on this batch of circuit boards? Thanks in advance.

If you are using a dual SOIC adapter it will not work.

You must use a single SOIC adapter .

Yes, the LME adapter that I have is the dual one. So I guess this version of the HT MC PS is different from the Mark I, then?

@Sachin: Going by this, I guess I have the wrong LME adapter.

@Hypnotoad: does the single SOIC adapter use pin 4 for V- and pin 7 for V+? I am asking this because the V- and V+ voltages are available on pins 4 and 7 respectively on the board.

You need to have LME49990's soldered to single SOIC to DIP adaptors, they are powered on pins 4 & 7.

Gotcha! Thanks for clarifying that.

Edit:
So I still feel that the problem is not in the LME opamp but somewhere in the circuit board.

I take back my words.
 
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